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When designing concurrency control schemes, we must show that schedules generated by the scheme are serializable To do that, we must rst understand how to determine, given a particular schedule S, whether the schedule is serializable We now present a simple and ef cient method for determining con ict serializability of a schedule Consider a schedule S We construct a directed graph, called a precedence graph, from S This graph consists of a pair G = (V, E), where V is a set of vertices and E is a set of edges The set of vertices consists of all the transactions participating in the schedule The set of edges consists of all edges Ti Tj for which one of three conditions holds: 1 Ti executes write(Q) before Tj executes read(Q) 2 Ti executes read(Q) before Tj executes write(Q) 3 Ti executes write(Q) before Tj executes write(Q)

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The McGraw Hill Companies, 2001

The plot, shown in Fig 6-14, shows the current approaching the nal value of 2 A in about 125 s, as would be expected from the time constant EXAMPLE 6-11 A resistor R = 12 and inductor L = 4 H are connected in series with a sinusoidal voltage source v s (t) = 20 sin 30t Find the total response of the circuit for i(t) The initial current is zero SOLUTION The differential equation describing the circuit is 4 di + 12i(t) = 20 sin 30t dt

T1 (a)

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T2 (b)

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The zero-input response is found by setting the value due to the source (the input on the right-hand side of the equation) to zero This gives di H + 3i H (t) = 0 dt We nd the solution to be i H (t) = K e 3t where K is a constant to be determined from the initial condition Now we need to solve for the zero-state response, or the particular solution for the current

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If an edge Ti Tj exists in the precedence graph, then, in any serial schedule S equivalent to S, Ti must appear before Tj For example, the precedence graph for schedule 1 in Figure 1515a contains the single edge T1 T2 , since all the instructions of T1 are executed before the rst instruction of T2 is executed Similarly, Figure 1515b shows the precedence graph for schedule 2 with the single edge T2 T1 , since all the instructions of T2 are executed before the rst instruction of T1 is executed The precedence graph for schedule 4 appears in Figure 1516 It contains the edge T1 T2 , because T1 executes read(A) before T2 executes write(A) It also contains the edge T2 T1 , because T2 executes read(B) before T1 executes write(B) If the precedence graph for S has a cycle, then schedule S is not con ict serializable If the graph contains no cycles, then the schedule S is con ict serializable A serializability order of the transactions can be obtained through topological sorting, which determines a linear order consistent with the partial order of the precedence graph There are, in general, several possible linear orders that can be obtained through a topological sorting For example, the graph of Figure 1517a has the two acceptable linear orderings shown in Figures 1517b and 1517c Thus, to test for con ict serializability, we need to construct the precedence graph and to invoke a cycle-detection algorithm Cycle-detection algorithms can be found in standard textbooks on algorithms Cycle-detection algorithms, such as those based on depth- rst search, require on the order of n2 operations, where n is the number of vertices in the graph (that is, the number of transactions) Thus, we have a practical scheme for determining con ict serializability Returning to our previous examples, note that the precedence graphs for schedules 1 and 2 (Figure 1515) indeed do not contain cycles The precedence graph for schedule 4 (Figure 1516), on the other hand, contains a cycle, indicating that this schedule is not con ict serializable Testing for view serializability is rather complicated In fact, it has been shown that the problem of testing for view serializability is itself NP-complete Thus, almost certainly there exists no ef cient algorithm to test for view serializability See.

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